Job in Chennai for Verification Engineer

Job Description

Title: Chip Design - Verification Engineer

Experience: Fresher (0) – 2 Years

Roles and Responsibilities:

• To play the role of Verification engineer at the Block level, Chip level Functional verification.

• Develop verification test plans from design specifications

• Development of test environments using System Verilog and UVM verification methodologies.

• Create multiple test cases as per test plan and launch regressions.

• Generate Code/Functional coverage, analyze coverage results and correlate with the test plan.

• Working with the design team members to identify and quickly resolve problems with the design.

• Communicate regularly with the team members to resolve issues and report status. * Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges.

Eligibility Criteria: B.E/B.TECH CSE, IT, ECE & EEE, M.E/M.TECH VLSI Passed out batch – 2017 - 2021 Only 60% aggregate and above from SSLC/HSC/Graduation

Contact Informations

Recruiting For : Edveon Technologies
Contact Person : Adhithya S
Contact Email : info@edveon.com
Contact Mobile : +91 9150367773